The VLSI correlator chip forms the heart of the correlator system. This full-custom CMOS VLSI chip features 512 lags, which can be rearanged internally into 16 real or 8 complex independent correlator cells with respectively 32 or 16 lags. It operates at 32 MHz clock rate.
Each of the 8 complex correlator sections include a buffer that allows capture of station-based processing parameters embedded in the serial-data streams from the Station Units. The data captured in these buffers allows the necessary phase/delay parameters to be computed and applied to the data.
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Joint Institute for VLBI in Europe |