Post Correlator Integrator

Design

A solution that meets the requirements mentioned in here, is the following:

• Each correlator rack will be fitted with two DSP-boards (quad TexasInstruments C6x). These boards feature two PEM-slots (Processor Enhancement Module) and one PMC (PCI Mezzanine Card) slot. The two PEM slots will be equipped with a PEM-C40 module each. The PMC slot will be fitted with a SCSI controller.
• Each DSP-board will be connected to four correlator boards via the C40 high speed serial links.
• Each DSP-board will have a DDS3 tape unit attached to the SCSI controller. This poses quite a constraint on the output datarate. However, if the system proves to work, the output datarate can easily be upgraded by attaching other SCSI devices to the controller.

In this scheme, the HPUX realtime system instructs the correlator board DSPs to send data out over the serial link, it instructs the DSP board to accept data and it indicates to the DSP board which processing is desired.

The DSP board now reads data from the serial links at the highest rate; each correlator board's data gets distributed to a dedicated DSP (four DSPs per DSP board and input from four correlator boards).

Each DSP performs the indicated calculations on the data and integrates into its local memory

After all processing is done and the desired number of samples are integrated, each DSP in turn writes the contents of the integrated buffer to the attached SCSI device.

Dedicated offline software can now read the data stored on the SCSI media, interpret it and produce output datafiles ready to use by other offline inspection/processing software (e.g. AIPS, AIPS++).

Please send comments and suggestions to: Harro Verkouter

Joint Institute for VLBI in Europe